Microchip Technology /ATSAMV70N20 /SUPC /WUMR

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Interpret as WUMR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (NOT_ENABLE)SMEN 0 (NOT_ENABLE)RTTEN 0 (NOT_ENABLE)RTCEN 0 (NOT_ENABLE)LPDBCEN0 0 (NOT_ENABLE)LPDBCEN1 0 (NOT_ENABLE)LPDBCCLR 0 (IMMEDIATE)WKUPDBC 0 (DISABLE)LPDBC

LPDBCCLR=NOT_ENABLE, LPDBCEN0=NOT_ENABLE, RTCEN=NOT_ENABLE, LPDBC=DISABLE, SMEN=NOT_ENABLE, WKUPDBC=IMMEDIATE, LPDBCEN1=NOT_ENABLE, RTTEN=NOT_ENABLE

Description

Supply Controller Wakeup Mode Register

Fields

SMEN

Supply Monitor Wakeup Enable

0 (NOT_ENABLE): The supply monitor detection has no wakeup effect.

1 (ENABLE): The supply monitor detection forces the wakeup of the core power supply.

RTTEN

Real-time Timer Wakeup Enable

0 (NOT_ENABLE): The RTT alarm signal has no wakeup effect.

1 (ENABLE): The RTT alarm signal forces the wakeup of the core power supply.

RTCEN

Real-time Clock Wakeup Enable

0 (NOT_ENABLE): The RTC alarm signal has no wakeup effect.

1 (ENABLE): The RTC alarm signal forces the wakeup of the core power supply.

LPDBCEN0

Low-power Debouncer Enable WKUP0

0 (NOT_ENABLE): The WKUP0 input pin is not connected to the low-power debouncer.

1 (ENABLE): The WKUP0 input pin is connected to the low-power debouncer and forces a system wakeup.

LPDBCEN1

Low-power Debouncer Enable WKUP1

0 (NOT_ENABLE): The WKUP1 input pin is not connected to the low-power debouncer.

1 (ENABLE): The WKUP1 input pin is connected to the low-power debouncer and forces a system wakeup.

LPDBCCLR

Low-power Debouncer Clear

0 (NOT_ENABLE): A low-power debounce event does not create an immediate clear on the first half of GPBR registers.

1 (ENABLE): A low-power debounce event on WKUP0 or WKUP1 generates an immediate clear on the first half of GPBR registers.

WKUPDBC

Wakeup Inputs Debouncer Period

0 (IMMEDIATE): Immediate, no debouncing, detected active at least on one Slow Clock edge.

1 (_3_SLCK): WKUPx shall be in its active state for at least 3 SLCK periods

2 (_32_SLCK): WKUPx shall be in its active state for at least 32 SLCK periods

3 (_512_SLCK): WKUPx shall be in its active state for at least 512 SLCK periods

4 (_4096_SLCK): WKUPx shall be in its active state for at least 4,096 SLCK periods

5 (_32768_SLCK): WKUPx shall be in its active state for at least 32,768 SLCK periods

LPDBC

Low-power Debouncer Period

0 (DISABLE): Disables the low-power debouncers.

1 (_2_RTCOUT): WKUP0/1 in active state for at least 2 RTCOUTx clock periods

2 (_3_RTCOUT): WKUP0/1 in active state for at least 3 RTCOUTx clock periods

3 (_4_RTCOUT): WKUP0/1 in active state for at least 4 RTCOUTx clock periods

4 (_5_RTCOUT): WKUP0/1 in active state for at least 5 RTCOUTx clock periods

5 (_6_RTCOUT): WKUP0/1 in active state for at least 6 RTCOUTx clock periods

6 (_7_RTCOUT): WKUP0/1 in active state for at least 7 RTCOUTx clock periods

7 (_8_RTCOUT): WKUP0/1 in active state for at least 8 RTCOUTx clock periods

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